1. Field of the Invention
The present invention relates generally to fiber optic communication devices and more particularly to a transimpedance amplifier in a fiber optic receiver circuit.
2. Description of the Related Art
A fiber optic receiver circuit typically includes a photodiode and a transimpedance amplifier. The photodiode converts a light signal received from a fiber optic cable to an electrical current signal, and the transimpedance amplifier converts the electrical current signal to an electrical voltage signal for further processing. The power of the light signal can vary at an input of the fiber optic receiver circuit. For example, the power of the light signal varies with the distance traveled in the fiber optic cable and the attenuation ratio of the fiber optic cable.
In some applications, the power of the light signal at the input of the fiber optic receiver can range from less than 100 microwatts to over 2 milliwatts. The transfer characteristic of the photodiode is typically 0.75 to 1 watt per ampere. Thus, the electrical current signal generated by the photodiode has a wide range of possible values. The transimpedance amplifier typically requires a wide dynamic range to process the electrical current signal from the photodiode without distortion.
FIG. 1 illustrates a typical fiber optic receiver circuit. The fiber optic receiver circuit includes a single-ended optical detector circuit 100 and a single-ended input transimpedance amplifier 102. The optical detector circuit 100 includes a photodiode 104, a filter capacitor 106, and a bias resistor 108. The bias resistor 108 is coupled between a cathode of the photodiode 104 and a power source (VCC). The filter capacitor 106 is coupled between the cathode of the photodiode 104 and ground. An anode of the photodiode 104 provides a current as a single-ended output of the singled-ended optical detector circuit 100.
A light signal (or a light input) at the input of the fiber optic receiver circuit is unipolar (e.g., has two logical states represented by dark or light). In response to the unipolar light signal, the photodiode 104 generates a unipolar electrical current (Iin) flowing in one direction from the cathode to the anode. The amplitude of the unipolar electrical current is proportional to intensity of the light signal. As the intensity of the light signal changes, the amplitude and average value of the unipolar electrical current also change. The average value or direct current (DC) portion of the unipolar electrical current is provided via the bias resistor 108, and the alternating current (AC) portion of the unipolar electrical current is provided via the filter capacitor 106. The anode of the photodiode 104 is typically connected to a single-ended input of the transimpedance amplifier 102.
The transimpedance amplifier 102 includes a first stage amplifier 110, a second stage amplifier 112, and a feedback resistor 114. The unipolar electrical current is provided to an inverting input of the first stage amplifier 110. A non-inverting input of the first stage amplifier 110 is coupled to ground. The feedback resistor 114 is coupled between the inverting input and an output of the first stage amplifier 110. The output of the first stage amplifier 110 is coupled to a non-inverting input of the second stage amplifier 112. A reference voltage is coupled to an inverting input of the second stage amplifier 112. The second stage amplifier 112 outputs a differential pair of voltages (V+, Vxe2x88x92) on a V+ output terminal and a Vxe2x88x92 output terminal, respectively.
The first stage amplifier 110 uses the feedback resistor 114 to convert the unipolar electrical current (or the input current) to a single-ended voltage. The second stage amplifier 112 uses the reference voltage to convert the single-ended voltage to the differential pair of output voltages (V+, Vxe2x88x92), which is the output of the transimpedance amplifier 102.
The single-ended transimpedance amplifier 102 has a limited dynamic range. For example, relatively high input currents can cause circuit saturation in the first stage amplifier 110. The circuit saturation affects timing (e.g., extra delay or jitter at data transitions) and can result in degradation of bit error ratio, which is a measure of the system performance.
Furthermore, varying input currents can cause signal distortion at the output of the second stage amplifier 112. The reference voltage used by the second stage amplifier 112 to convert the single-ended voltage to the differential voltage typically has a fixed level. The level of the reference voltage determines a slice level which differentiates between logic high and logic low. The slice level should be set at approximately 50% of the amplitude (or the DC level) of the single-ended voltage to preserve signal pulse widths (or duty cycle) in the differential voltage. The DC level of the single-ended voltage varies as the amplitude of the input current varies. Thus, the duty cycle (or pulse widths) may be distorted at the output of the transimpedance amplifier 102.
FIG. 2 illustrates another typical fiber optic receiver circuit which is substantially similar to the fiber optic receiver circuit described in FIG. 1 with an additional DC cancellation circuit 200 as part of a transimpedance amplifier 202. The DC cancellation circuit 200 minimizes the signal distortion described above by sensing the DC levels of the differential pair of output voltages (V+, Vxe2x88x92) and generating a current sink to remove the DC input current (Iin(DC)) at the input of the transimpedance amplifier 202.
For example, the DC cancellation circuit 200 includes a low pass filter 204, an operational amplifier 206, and a voltage control current source (VCCS) 208. The low pass filter 204 is coupled across the differential output voltage to sense a difference in the DC levels between V+ and Vxe2x88x92. The operational amplifier 206 is coupled to an output of the low pass filter 204 and generates a control voltage indicative of the difference in the DC levels between V+ and Vxe2x88x92. The VCCS 208 generates a current sink with a level that is determined by the control voltage, and the current sink is coupled to the input of the transimpedance amplifier 202.
The DC cancellation circuit 200 is a feedback loop that typically responds slowly (or requires a long time to settle to a final state) due to bandwidth requirements. Thus, the DC cancellation circuit 200 is not suitable for burst mode data communication. Furthermore, the value of capacitors used in the DC cancellation circuit 200 is relatively large and cannot be efficiently implemented in integrated circuits.
The present invention solves these and other problems by providing a pseudo-differential transimpedance amplifier which improves dynamic range and minimizes signal distortion. The pseudo-differential transimpedance amplifier can be used in an optical receiver circuit which translates a light signal into an electrical voltage signal. An optical detector first senses the light signal and generates an electrical current signal in response. The pseudo-differential transimpedance amplifier uses a differential configuration to convert the electrical current signal to differential voltage signals. In addition to other benefits, the differential configuration can advantageously double a current-to-voltage conversion gain.
In one embodiment, the pseudo-differential transimpedance amplifier includes a pseudo-differential input stage. For example, the pseudo-differential input stage includes a first input amplifier and a second input amplifier. The first input amplifier is AC-coupled to the optical detector and is configured to convert a first input current to a first output voltage (or a first pseudo-differential voltage). The second input amplifier is DC-coupled to the optical detector and is configured to convert a second input current to a second output voltage (or a second pseudo-differential voltage).
In one embodiment, the first input amplifier is coupled via a capacitor (or AC-coupled) to a cathode of a photodiode in the optical detector. The second input amplifier is directly coupled (or DC-coupled) to an anode of the photodiode in the optical detector. Thus, the first input current has no substantial DC component while the second input current has a DC offset. Furthermore, the first input current and the second input current correspond to opposite polarities of the electrical current signal generated by the photodiode. Accordingly, the polarity of the first output voltage is opposite the polarity of the second output voltage in the pseudo-differential input stage. The first output voltage and the second output voltage can be provided to a differential output stage which generates differential output voltages for the pseudo-differential transimpedance amplifier.
The pseudo-differential transimpedance amplifier can advantageously allow a conventional single-ended system to achieve a differential architecture with minimal modification and without adding extra components. In one embodiment, the pseudo-differential transimpedance amplifier is coupled to a single-ended optical detector which is modified to provide pseudo-differential outputs to the pseudo-differential transimpedance amplifier. A simple modification allows the optical detector to provide an AC-coupled output in addition to a DC-coupled output provided by an anode of a photodiode in the optical detector. For example, the connection of a filter capacitor in the single-ended optical detector can be easily modified to allow the filter capacitor to act as a DC-blocking (or an AC-coupling) capacitor. The capacitor provides the AC-coupled output which is connected to the first input amplifier of the pseudo-differential transimpedance amplifier. The DC-coupled output provided by the anode of the photodiode is connected to the second input amplifier.
In one embodiment, the pseudo-differential transimpedance amplifier further includes a DC compensation circuit which operates to minimize a DC component of the electrical current signal at the DC-coupled input to the pseudo-differential transimpedance amplifier. For example, the DC compensation circuit detects the level (or the amplitude) of the electrical current signal (or the input current) from the optical detector and generates a correction current to remove the DC component at the DC-coupled input of the pseudo-differential transimpedance amplifier. Thus, the DC compensation circuit can facilitate the pseudo-differential transimpedance amplifier to operate in a differential mode (e.g., as if both inputs are AC-coupled to the optical detector) even though only the first input is AC-coupled to the optical detector while the second input is DC-coupled to the optical detector.
In one embodiment, the DC compensation circuit includes a peak-hold circuit and a voltage-to-current converter for automatic and continuous high-speed DC compensation. For example, the peak-hold circuit detects the amplitude of the input current by monitoring the first output voltage produced by the first input amplifier in response to the input current. The first input amplifier is AC-coupled to the optical detector. Therefore, the first output voltage generated by an AC component of the input current from the optical detector has no substantial DC offset, and the amplitude of the input current can be easily derived from the first output voltage. The peak-hold circuit is relatively fast to provide a continually updated output indicative of the input current level.
The output of the peak-hold circuit controls the voltage-to-current converter which generates an output correction current corresponding to a partial or a substantial portion of the DC component of the input current. The output of the voltage-to-current converter is coupled to the DC coupled input of the pseudo-differential transimpedance amplifier and draws current away from the second input amplifier to reduce the DC component of the second input current. Reducing the DC component of the second input current reduces an undesirable DC offset in the second output voltage.
Reducing the DC offset in the second output voltage minimizes variations in the common mode voltage between the first output voltage and the second output voltage for optimal performance as differential signals. The first output voltage and the second output voltage are provided to the differential output stage, which generates differential output voltages for the pseudo-differential transimpedance amplifier. The duty cycle of the differential output voltages, which affects timing accuracy of data transitions, is well maintained by minimizing the difference in DC levels between the first output voltage and the second output voltage.
In one embodiment, the DC compensation circuit is selectively activated to optimize a signal-to-noise ratio (SNR). For example, the DC compensation circuit is selectively inactive or activated in discrete steps to minimize input referred noise (or circuit noise) during relatively low input level signals. In one embodiment, the DC compensation circuit includes an amplitude detection circuit to monitor the amplitude of the first output voltage. The amplitude detection circuit advantageously comprises a comparator with a peak-hold circuit or comprises a comparator with a fast logic level hold circuit.
In particular embodiments, the DC compensation circuit further includes a current generator that provides a correction current when the amplitude detection circuit indicates that the amplitude of the first output voltage exceeds a predetermined threshold. The current generator may be a voltage-controlled-current-source (VCCS), a voltage-controlled resistor, or a current mirror circuit. In one embodiment, the current generator increases the correction current in discrete steps as the amplitude of the first output voltage increases and exceeds corresponding predetermined thresholds.
The DC compensation circuit is a relatively high-speed circuit that allows the pseudo-differential transimpedance amplifier to respond quickly to changes in input current levels. Thus, the pseudo-differential transimpedance amplifier is suitable for burst mode optical communication or high-speed communication systems such as Gigabit Ethernet systems.